IC’Alps is proud to collaborate with SEALSQ on a groundbreaking initiative to address the growing demand for secure, customized ASIC solutions.
Leveraging SEALSQ’s expertise in quantum-resistant chip technology and IC’Alps’ proven track record in ASIC design, this partnership is set to revolutionize the development of secure integrated circuits. Together, we aim to streamline design and manufacturing processes while meeting the most stringent application-specific requirements.
A key highlight of this collaboration is the development of SEALSQ’s QVault TPM, the first chip to emerge from this partnership, with initial samples expected in Q1 2025. This secure chip, built on SEALSQ’s QS7001 architecture, demonstrates the potential of combining advanced security IP with cutting-edge ASIC design expertise.
"This collaboration was a true partnership, with each team bringing its own expertise and approach. Drawing on our experience, we adapted our methods to meet SEALSQ’s rigorous security standards. This partnership underlines our commitment to supporting our customers in the development of their products."
Lucille Engels,
COO of IC'ALPS
“The collaboration between IC’ALPS and SEALSQ exemplifies the dynamic and innovative spirit of the French semiconductor ecosystem. This partnership showcases how mid-sized high-tech companies can unite their expertise to fast-track the development of cutting-edge products that not only meet market demands, but rival the capabilities of larger corporations. By combining agility with innovation, we are setting a benchmark for excellence in the competitive global semiconductor industry”.
Jean Pierre Enguent,
CTO of SEALSQ
Want to learn more?
Download the full press release to explore the details of this partnership and its implications for innovative secure chips.