Set of primary blocks we use when designing your ASIC/SoC
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Set of primary blocks we use when designing your ASIC/SoC
By using them as they are or modify them to fit customer’s needs, our team improves performance & design time and helps offer differentiated IC architectures. It reduces development risks and costs while contributing to first-time-right project execution.
Overall, this approach allows IC’Alps to better serve our customers when designing their ASIC/SoC.
We develop our own IP component library to assess the reachable performance and gather experience for future ASIC integration.
Our IP solutions have been silicon verified in one or more technological nodes and are scalable and portable with respect to foundry’s specific manufacturing process.
The following in-house IP components are available to our customers to complement our third-party IP partnerships.
12-bit general purpose Analog-to-Digital Converter (ADC) with a sampling rate up to 1-MSPS.
Ultra-low power analog front-end (AFE) readout circuit designed for wearable and implantable medical devices. Clinical-grade electrocardiogram (ECG) waveforms and QRS detection
Nanopower unipolar acqusition chain for intracardiac pacemaker
Through capitalization of our IP library and re-use of standard blocks
Compared to full in-house design
With silicon proven subsystems
Across a variety of technologies
