Mastering conventional techniques is critical to the success of any low power ASIC project, such as the following ones. However, in order to guarantee even more competitive power consumption, it is necessary to use unconventional techniques. Choosing the right techniques depends on the context of our customers’ final application.
Dynamic Power:
Clock gating
CTS optimization
Multi-bit registers
Multi-voltage
Dynamic Voltage Frequency Scaling (DVFS)
Adaptive Voltage Scaling (AVS)
Forward Body Biasing (lower VDD)
Custom charge pump / DCDC / LDO Design
Leakage Power:
Area optimization
Multi-Vt libraries
Limited usage of LVT cells
Channel length variants (poly biasing)
Multi-voltage
Power gating
Reverse Biasing/low voltage retention
At IC’Alps, we have developed strong experience, along with maturity proven design flow and early power estimation solutions (enabling aggressive approaches) leading to the energy efficiency required for your application.
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