How to choose the right ASIC/SoC Design House?

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Choosing the right team for your ASIC is an important step as investment may be important and risks have to be properly managed. Several criteria can help in this selection: the direct experience with the potential partner or their recognized expertise (by word of mouth or published success stories), the business model, the capacity to identify challenges and address them with solutions, and many others ….

So how do you choose the right ASIC/SoC Design House?

 

Why make sure you have the right Design House by your side?

 

The fact is designing an ASIC is never a straightforward path. Each ASIC has its own requirements and constraints and the first challenge is to identify all of them, as starting point. Until the validation of performances on silicon within the application environment, traps and issues need to be circumvent. These issues, if not addressed, will contribute in straining relationship because money and time-to-market are parts of the equation.

This is why designing an ASIC is not only a matter of technical expertise but also a matter of trust and commitment to build a strong relationship from the beginning with the selected partner.

 

Questions you must ask to choose the right Design House

 

The selection step is thus crucial and you should not overlook it. However, how can you make sure you have the right ASIC design team by your side?

To help you in this task, we listed and answered top six most frequently asked questions during the selection process.

[Answers are our own and another ASIC design house may very well provide you with different answers just as relevant to your project]

 

What is your experience in my application?

 

Technical expertise

IC’Alps has gathered experience in ultrasound Rx/Tx circuits, ultra-low-power with design reaching the nA of power consumption, sensor and bio-sensor interfaces with custom acquisition chains.

Regarding the application level, IC’Alps has built experience in healthcare, industrial, automotive, IoT and Digital Security domains and the Team collective experience in ASIC Design is more than 400 years.

Since our incorporation and with strong support from Doliam Group, IC’Alps has already designed more than twenty ASIC databases for tape-outs.

 

Proven methodology

At the start of a project, if needed, IC’Alps defines the ASIC requirements with the customer during the feasibility phase and is able to develop, if necessary, a simulation model recreating the customer application environment for requirements fine-tuning.

At the start of every relationship, IC’Alps include senior designers in the technical discussions with the Customer. These experienced people will then be part of the Design team after the selection.

 

Have you developed your own IPs?

 

We have developed IPs ADC SAR Analog IP like elements of acquisition chain, standard communication interface, internal FIFO, power regulators, charge pump, high-voltage drivers, oscillators, SAR and Sigma Delta ADC converters, DAC, hardware accelerators or POR. We can reuse and upgrade these IPs to make an ASIC best fit for your application.

 

 

How do you select external IPs?

 

We design a selection process together with our customer. We are able to take responsibility from IP selection to their integration in the IC with acceptance procedure of integration views, review of integration rules and industrial test requirements at silicon level Finally, if required by the IP supplier, we have experience in the foundry merge rooms to integrate their protected IP.

Of course, you could also want to manage IPs on your own and it’s fine with us. Our a-la-carte service offer also means that, at any step, you set our level of engagment in your project.

 

What is your experience level with foundries?

 

With more than twenty ASIC database designed in four years, IC’Alps has built a strong experience with various foundries on advanced nodes.

We carried out multiple projects on their most relevant technology: 0.18µm for medical devices and ultrasound, 55nm for embedding CPUs (ARM or RISC-V) or when more memory or frequency were needed. We are able to design on more advanced nodes (28nm and under: 16, 12 and down to 7nm technologies) for more specific needs (frequency, consumption, 10+ CPUs architectures or else.)

IC’Alps is also a 100% independent Design & Supply house and in this capacity, we are able to work with every founder when it comes to finding the most relevant solution to the Customer’s needs.

Moreover, some of our collaborators are making ASIC since more than 25 years and had worked with many foundries and technologies including TSMC, Xfab, TowerSemi, GF, UMC, ST, etc.

 

How do you secure resources for a project?

 

In addition to the fact that IC’Alps is one of the largest independent ASIC design team in Europe (around 45+ people), we rely on a well-developed partners network (IP partner, foundry partner, EDA vendors, OSAT) and silicon proven design flows (analog and digital), and methodologies.

Our experienced Project Managers will optimize resources allocation and make sure that each project is properly staffed and supported until completion.

 

How do you assess or limit the risks of the design process?

 

Experience is crucial and our quality system is key in identifying, assessing and addressing risks. For example, we perform and include a preliminary risk assessment in our Statement of Work (SoW), and we regularly review this assessment during the project with the Customer. Finally, we continuously challenge our Quality System for improvement.

 

This list of questions, while not comprehensive, is a very good starting point for your partner selection process. It reflects some of the major points that require an open discussion if you are to travel far with your selected partner.

Do you think of any questions worth adding to this list?

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