ENSTA selects IC’Alps for eFPGA implementation

IC’Alps and ENSTA Bretagne - member of Lab-STICC, a multidisciplinary research laboratory - announced successful implementation of an embedded FPGA (eFPGA) core on silicon.

In the press, Nouvelles

About eFPGA

 

An embedded FPGA (eFPGA) is a programmable IP core integrated into SoCs or custom ICs (ASIC).

eFPGA technology is winning converts among system architects because market requirements are constantly changing and integrated circuits are becoming increasingly complex and expensive to develop

Adding eFPGA functionality to ASIC designs brings the flexibility and performance of programmable logic without the cost, but with better power, performance, throughput and latency.

 

A first demonstrator in TSMC 55 nm ULP process technology back from fab and tested fully functional

 

  • 3200 4-inputs look-up tables (LUTs)
  • Standard cell based to enable seamless generation from an RTL netlist
  • Technology independent core (standard cell based)
  • Fully integrated into standard RTL design flows
  • Generated and programmed with ENSTA’s ArGen framework

 

IC’Alps was handed the responsibility of silicon implementation and prototyping, both needed to make a first demonstrator of ENSTA’s technology. The company was in charge of IC definition, foundry process selection, design (synthesis, floorplan, IO ring, place & route), design for testability, post layout simulations and verifications before launch in fabrication. IC’Alps took in charge the required supply chain management including selection of partners, fabrication, and package assembly.

 

IC'Alps Logo

 

Our Team has supported ENSTA-Bretagne from ASIC specification, reached tape-out and delivered packaged dies on-time, even during this COVID period. Last but not least, the team demonstrated its implication to reach first silicon good silicon.

Jean-Luc Triouleyre,CEO of IC’Alps

 

 

Download the announcement [EN]

Télécharger le communiqué [FR]

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Let’s get in touch with our Business Managers for an initial discussion or to request an ASIC Design Consultation!